From 71cbc47785f532e0c15707bc4e978677078e335b Mon Sep 17 00:00:00 2001
From: Shrawan Parmar <skp196@usask.ca>
Date: Wed, 23 Nov 2022 12:21:01 -0600
Subject: [PATCH] modified process_engine.sv
---
cme433_lrtestbench-main/src/mult16via8.sv | 5 +---
cme433_lrtestbench-main/src/process_engine.sv | 24 +++++++++----------
2 files changed, 13 insertions(+), 16 deletions(-)
diff --git a/cme433_lrtestbench-main/src/mult16via8.sv b/cme433_lrtestbench-main/src/mult16via8.sv
index 3af6976..4359739 100644
--- a/cme433_lrtestbench-main/src/mult16via8.sv
+++ b/cme433_lrtestbench-main/src/mult16via8.sv
@@ -9,7 +9,6 @@ module mult16bvia8bit (
///////////////////////////// Instantiate your multiplier here ///////////////////////////////////////
//exact_mult mult (
- //our_mult mult (
approx_mult mult (
.i_a(inA[0]),
.i_b(inB[0]),
@@ -21,9 +20,7 @@ module mult16bvia8bit (
generate
;
for (i = 1; i < 4; i = i + 1) begin : base
- //exact_mult mult (
- //our_mult mult (
- approx_mult mult (
+ exact_mult mult (
.i_a(inA[i]),
.i_b(inB[i]),
.o_z(ouP[i])
diff --git a/cme433_lrtestbench-main/src/process_engine.sv b/cme433_lrtestbench-main/src/process_engine.sv
index 513a8b2..046e548 100644
--- a/cme433_lrtestbench-main/src/process_engine.sv
+++ b/cme433_lrtestbench-main/src/process_engine.sv
@@ -1,21 +1,21 @@
module process_engine(
- input logic signed [ 7:0] i_a [8:0],
- input logic signed [ 7:0] i_b [8:0],
+ input logic signed [ 15:0] i_a [8:0],
+ input logic signed [ 15:0] i_b [8:0],
output logic signed [31:0] o_z
);
-reg [15:0] product_result [8:0];
+reg [31:0] product_result [8:0];
///////////////////////////// Instantiate 9 multipliers ///////////////////////////////////////
-approx_mult mult0 ( .i_a(i_a[0]), .i_b(i_b[0]),.o_z(product_result[0]));
-approx_mult mult1 ( .i_a(i_a[1]), .i_b(i_b[1]),.o_z(product_result[1]));
-approx_mult mult2 ( .i_a(i_a[2]), .i_b(i_b[2]),.o_z(product_result[2]));
-approx_mult mult3 ( .i_a(i_a[3]), .i_b(i_b[3]),.o_z(product_result[3]));
-approx_mult mult4 ( .i_a(i_a[4]), .i_b(i_b[4]),.o_z(product_result[4]));
-approx_mult mult5 ( .i_a(i_a[5]), .i_b(i_b[5]),.o_z(product_result[5]));
-approx_mult mult6 ( .i_a(i_a[6]), .i_b(i_b[6]),.o_z(product_result[6]));
-approx_mult mult7 ( .i_a(i_a[7]), .i_b(i_b[7]),.o_z(product_result[7]));
-approx_mult mult8 ( .i_a(i_a[8]), .i_b(i_b[8]),.o_z(product_result[8]));
+mult16bvia8bit mult0 ( .i_a(i_a[0]), .i_b(i_b[0]),.o_z(product_result[0]));
+mult16bvia8bit mult1 ( .i_a(i_a[1]), .i_b(i_b[1]),.o_z(product_result[1]));
+mult16bvia8bit mult2 ( .i_a(i_a[2]), .i_b(i_b[2]),.o_z(product_result[2]));
+mult16bvia8bit mult3 ( .i_a(i_a[3]), .i_b(i_b[3]),.o_z(product_result[3]));
+mult16bvia8bit mult4 ( .i_a(i_a[4]), .i_b(i_b[4]),.o_z(product_result[4]));
+mult16bvia8bit mult5 ( .i_a(i_a[5]), .i_b(i_b[5]),.o_z(product_result[5]));
+mult16bvia8bit mult6 ( .i_a(i_a[6]), .i_b(i_b[6]),.o_z(product_result[6]));
+mult16bvia8bit mult7 ( .i_a(i_a[7]), .i_b(i_b[7]),.o_z(product_result[7]));
+mult16bvia8bit mult8 ( .i_a(i_a[8]), .i_b(i_b[8]),.o_z(product_result[8]));
///////////////////////////// add all results from 9 multipliers ///////////////////////////////////////
--
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